The present invention relates to a semiconductor device with a substrate bias generator.
There has been known a substrate bias generator which generates a voltage with an opposite polarity to that of a power source voltage externally supplied and supplies it to a substrate. A substrate bias generator is formed on a semiconductor substrate. FIG. 1 shows an example of the substrate bias generator using the charge pumping effect. As shown, a circuit for generating an alternating voltage (referred to as a generating circuit) 10 grounded at one end generates an AC voltage oscillating between the reference voltage V.sub.SS and the power source voltage V.sub.DD. The other end of the generating circuit 10 is connected through a capacitor 12 for charge pumping to the source of an N channel MOS transistor 14. The gate and drain of the MOS transistor 14 are both connected to a terminal 16 connected to the substrate. A node between the generating circuit 10 and the capacitor 12 is denoted as N1 and a node between the source of the transistor 14 and the capacitor 12 is denoted as N2. The node N2 is connected to the gate and drain of an N channel MOS transistor 18 the source of which is grounded. The transistors 14 and 18 effects the rectification. The current rectified flows from the terminal 16 to ground through the node N2. The charge induced into the node N2 by means of the generating circuit 10 via the capacitor 12 is supplied from the terminal 16. The induced charge is discharged to ground through the transistor 18. Through the charge pumping action, a current flows from the terminal 16 to ground, so that the terminal (substrate) 16 is biased to a negative potential. FIG. 2 illustrates a structural diagram of the substrate bias generator shown in FIG. 1. A P type high concentration impurity region 22 and N type high concentration impurity regions 24, 26 and 28 are formed on the surface region of a P type silicon substrate (corresponding to the terminal 16 in FIG. 1). A gate electrode 32 is formed on the silicon substrate 20 between the N type high concentration impurity regions 24 and 26, with a gate insulating film 30 interposed therebetween. Another gate electrode 36 is formed on the N type high concentration impurity region 28 through a gate insulating film 34. The capacitor 12 is made up of the gate electrode 36, the gate insulating film 34 and the N type high concentration impurity region 28. The region 26, the electrode 32 and the region 24 serve as the source, gate and drain of the MOS transistor 14, respectively. The impurity region 22 is a diffusion region for enhancing the ohmic contact with the silicon substrate 20. Other circuit elements such as a memory cell are formed on the P type silicon substrate 20. The transistor 18 in FIG. 1 is not shown in FIG. 2.
The prior substrate bias generator has the following disadvantages. The potential at the impurity region 26 (corresponding to the node N2 in FIG. 1) changes with a variation of the output voltage from the generating circuit 10. Accordingly, the potential of the impurity region 26 falls possibly below that of the silicon substrate 20. At this time, the PN junction (corresponding to the diode 38 indicated by a broken line in FIG. 1) between the silicon substrate 20 and the high concentrated impurity region 26 is forwardly biased. Therefore, a large amount of electrons are injected into the silicon substrate 20. Since the life time of the minority carriers in the P type substrate is long, the carriers move in the substrate to possibly enter the peripheral circuit elements, providing causes of an erroneous operation of the integrated circuit. Particularly the integrated circuit operating in a dynamic mode uses many nodes in a floating state and hence is easily influenced by the minority carriers. Also in the static circuit, the floating nodes are frequently used for reducing the power consumption of the integrated circuit. When the electrons as the minority carriers are diffussed into the floating nodes, the circuit elements tends to erroneously operate.
In the case using the N type substrate, the holes enter the substrate to become the minority carriers, causing the erroneously operation of the circuit elements similarly.